Efficient FeFET Crossbar Accelerator for Binary Neural Networks

被引：5

作者：

Soliman, Taha ^{[1
]}

Olivo, Ricardo ^{[2
]}

Kirchner, Tobias ^{[1
]}

De la Parra, Cecilia ^{[1
]}

Lederer, Maximilian ^{[2
]}

Kampfe, Thomas ^{[2
]}

Guntoro, Andre ^{[1
]}

Wehn, Norbert ^{[3
]}

机构：

[1] Robert Bosch GmbH, Renningen, Germany

[2] Fraunhofer IPMS, Ctr Nanoelect Technol CNT, Dresden, Germany

[3] TU Kaiserslauten, Kaiserslauten, Germany

来源：

2020 IEEE 31ST INTERNATIONAL CONFERENCE ON APPLICATION-SPECIFIC SYSTEMS, ARCHITECTURES AND PROCESSORS (ASAP 2020) | 2020年

关键词：

FeFET Crossbar array; In-Memory computation; Binary Neural Networks; MEMORY;

D O I：

10.1109/ASAP49362.2020.00027

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

This paper presents a novel ferroelectric field-effect transistor (FeFET) in-memory computing architecture dedicated to accelerate Binary Neural Networks (BNNs). We present in-memory convolution, batch normalization and dense layer processing through a grid of small crossbars with reduced unit size, which enables multiple bit operation and value accumulation. Additionally, we explore the possible operations parallelization for maximized computational performance. Simulation results show that our new architecture achieves a computing performance up to 2.46 TOPS while achieving a high power efficiency reaching 111.8 TOPS/Watt and an area of 0.026 mm(2) in 22nm FDSOI technology.

引用

页码：109 / 112

页数：4

共 17 条

[1] Equivalent-accuracy accelerated neural-network training using analogue memory [J].

Ambrogio, Stefano ;

Narayanan, Pritish ;

Tsai, Hsinyu ;

Shelby, Robert M. ;

Boybat, Irem ;

di Nolfo, Carmelo ;

Sidler, Severin ;

Giordano, Massimo ;

Bodini, Martina ;

Farinha, Nathan C. P. ;

Killeen, Benjamin ;

Cheng, Christina ;

Jaoudi, Yassine ;

Burr, Geoffrey W. .

NATURE, 2018, 558 (7708) :60-+

[2] BRein Memory: A Single-Chip Binary/Ternary Reconfigurable in-Memory Deep Neural Network Accelerator Achieving 1.4 TOPS at 0.6 W [J].

Ando, Kota ;

Ueyoshi, Kodai ;

Orimo, Kentaro ;

Yonekawa, Haruyoshi ;

Sato, Shimpei ;

Nakahara, Hiroki ;

Takamaeda-Yamazaki, Shinya ;

Ikebe, Masayuki ;

Asai, Tetsuya ;

Kuroda, Tadahiro ;

Motomura, Masato .

IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2018, 53 (04) :983-994

[3]

Bocquet M., 2018 IEDM

[4] Ferroelectricity in hafnium oxide thin films [J].

Boescke, T. S. ;

Mueller, J. ;

Braeuhaus, D. ;

Schroeder, U. ;

Boettger, U. .

APPLIED PHYSICS LETTERS, 2011, 99 (10)

[5]

Chen X., DATE 18

[6]

Courbariaux, NIPS 15

[7]

Dunkel S., IEDM 17

[8]

Goodfellow I, 2016, ADAPT COMPUT MACH LE, P1

[9] Gradient-based learning applied to document recognition [J].

Lecun, Y ;

Bottou, L ;

Bengio, Y ;

Haffner, P .

PROCEEDINGS OF THE IEEE, 1998, 86 (11) :2278-2324

[10] A Ferroelectric FET-Based Processing-in-Memory Architecture for DNN Acceleration [J].

Long, Yun ;

Kim, Daehyun ;

Lee, Edward ;

Saha, Priyabrata ;

Mudassar, Burhan Ahmad ;

She, Xueyuan ;

Khan, Asif Islam ;

Mukhopadhyay, Saibal .

IEEE JOURNAL ON EXPLORATORY SOLID-STATE COMPUTATIONAL DEVICES AND CIRCUITS, 2019, 5 (02) :113-122

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