Complementary Metal-Oxide-Silicon Field-Effect-Transistors Featuring Atomically Flat Gate Insulator Film/Silicon Interface

被引:33
作者
Kuroda, Rihito [1 ]
Teramoto, Akinobu [2 ]
Nakao, Yukihisa [1 ]
Suwa, Tomoyuki [2 ]
Konda, Masahiro [2 ]
Hasebe, Rui [2 ]
Li, Xiang [1 ]
Isogai, Tatsunori [1 ]
Tanaka, Hiroaki [2 ]
Sugawa, Shigetoshi [1 ]
Ohmi, Tadahiro [2 ,3 ]
机构
[1] Tohoku Univ, Grad Sch Engn, Aoba Ku, Sendai, Miyagi 9808579, Japan
[2] Tohoku Univ, New Ind Creat Hatchery Center, Aoba Ku, Sendai, Miyagi 9808579, Japan
[3] Tohoku Univ, World Premier Int Res Ctr, Aoba Ku, Sendai, Miyagi 9808579, Japan
关键词
LOW-NOISE; SURFACE; TECHNOLOGIES; PERFORMANCE; SI(001);
D O I
10.1143/JJAP.48.04C048
中图分类号
O59 [应用物理学];
学科分类号
摘要
In this paper, we demonstrate newly developed process technology to fabricate complementary metal-oxide-silicon field-effect transistors (CMOSFETs) having atomically flat gate insulator film/silicon interface on (100) orientated silicon surface. They include 1,200 degrees C ultraclean argon ambient annealing technology for surface atomically flattening and radical oxidation technology for device isolation, flatness recovery after ion implantation, and gate insulator formation. The fabricated CMOSFET with atomically flat interface exhibit very high current drivability such as 923 and 538 mu A/mu m for n-channel MOSFET (nMOS) and p-channel MOSFET (pMOS) at gate length of 100 nm when combined with very low resistance source and drain contacts, four orders of magnitude lower 1 / f noise characteristics when combined with damage free plasma processes, and one decade longer time dependent dielectric breakdown (TDDB) lifetime in comparison to devices with a conventional flatness. The developed technology effectively improves the performance of the silicon-based CMOS large-scale integrated circuits (LSI). (C) 2009 The Japan Society of Applied Physics
引用
收藏
页数:6
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