Strain-Enhanced Performance of Si-Nanowire FETs

被引:4
|
作者
Casse, M. [1 ]
Barraud, S. [1 ]
Coquand, R. [1 ,2 ,3 ]
Koyama, M. [1 ,4 ]
Cooper, D. [1 ]
Vizioz, C. [1 ]
Comboroure, C. [1 ]
Perreau, P. [1 ]
Maffini-Alvaro, V. [1 ]
Tabone, C. [1 ]
Tosti, L. [1 ]
Barnola, S. [1 ]
Delaye, V. [1 ]
Aussenac, F. [1 ]
Ghibaudo, G. [3 ]
Iwai, H. [4 ]
Reimbold, G. [1 ]
机构
[1] CEA Leti, MINATEC Campus,17 Rue Martyrs, F-38054 Grenoble, France
[2] ST Microelect, F-38926 Crolles, France
[3] INPG MINATEC, IMEP LAHC, F-38016 Grenoble, France
[4] Tokyo Inst Technol, Frontier Res Ctr, Midori Ku, Yokohama, Kanagawa, Japan
关键词
CARRIER MOBILITY; ORIENTATION; TRANSISTORS; CMOS;
D O I
10.1149/05303.0125ecst
中图分类号
O646 [电化学、电解、磁化学];
学科分类号
081704 ;
摘要
The combination of a multi-gate architecture and strain engineering is a promising way to fabricate high performance CMOS transistors. In this work we examine the effect of strain in Si nanowire Tri-Gate and Omega-Gate transistors. We present and discuss the results of electrical characterization of these advanced devices, with special attention to the carrier mobility, and to the piezoresistive coefficients.
引用
收藏
页码:125 / 136
页数:12
相关论文
共 50 条
  • [21] Strain-enhanced sintering of iron powders
    D.R. Amador
    M.A. Monge
    J.M. Torralba
    R. Pareja
    Applied Physics A, 2005, 80 : 803 - 811
  • [22] Strain-enhanced sintering of iron powders
    Amador, DR
    Monge, MA
    Torralba, JM
    Pareja, R
    APPLIED PHYSICS A-MATERIALS SCIENCE & PROCESSING, 2005, 80 (04): : 803 - 811
  • [23] Assessment of the Electrical Performance of Short Channel InAs and Strained Si Nanowire FETs
    Grillet, Corentin
    Logoteta, Demetrio
    Cresti, Alessandro
    Pala, Marco G.
    IEEE TRANSACTIONS ON ELECTRON DEVICES, 2017, 64 (05) : 2425 - 2431
  • [24] Silicon nanowire FETs with uniaxial tensile strain
    Feste, S. F.
    Knoch, J.
    Habicht, S.
    Buca, D.
    Zhao, Q. -T.
    Mantl, S.
    SOLID-STATE ELECTRONICS, 2009, 53 (12) : 1257 - 1262
  • [25] Strained Si Nanowire Tunnel FETs and Inverters
    Zhao, Q. T.
    Knoll, L.
    Richter, S.
    Schmidt, M.
    Blaeser, S.
    Luong, G. V.
    Wirths, S.
    Nichau, A.
    Schaefer, A.
    Trellenkamp, S.
    Hartmann, J. -M.
    Bourdelle, K. K.
    Buca, D.
    Mantl, S.
    2013 THIRD BERKELEY SYMPOSIUM ON ENERGY EFFICIENT ELECTRONIC SYSTEMS (E3S), 2013,
  • [26] Photo-Attachment of Biomolecules for Miniaturization on Wicking Si-Nanowire Platform
    Cheng, He
    Zheng, Han
    Wu, Jia Xin
    Xu, Wei
    Zhou, Lihan
    Leong, Kam Chew
    Fitzgerald, Eugene
    Rajagopalan, Raj
    Too, Heng Phon
    Choi, Wee Kiong
    PLOS ONE, 2015, 10 (02):
  • [27] CONCERNING STRAIN-ENHANCED CORROSION MECHANISMS OF SCC
    VERMILYEA, DA
    DIEGLE, RB
    CORROSION, 1976, 32 (01) : 26 - 29
  • [28] Gate-All-Around Si-Nanowire Transistors: Simulation at Nanoscale
    Dey, S.
    Dash, T. P.
    Das, S.
    Mohapatra, E.
    Jena, J.
    Maiti, C. K.
    PROCEEDINGS OF 2018 IEEE INTERNATIONAL CONFERENCE ON ELECTRON DEVICES KOLKATA CONFERENCE (IEEE EDKCON), 2018, : 137 - 141
  • [29] Photoelectrocatalytic reduction of CO2 to methanol over a photosystem Ⅱ-enhanced Cu foam/Si-nanowire system
    Zichao Lian
    Donglai Pan
    Wenchao Wang
    Dieqing Zhang
    Guisheng Li
    Hexing Li
    Journal of Environmental Sciences, 2017, 60 (10) : 108 - 113
  • [30] A simulation study of strain induced performance enhancements in InAs nanowire Tunnel-FETs
    Conzatti, F.
    Pala, M. G.
    Esseni, D.
    Bano, E.
    Selmi, L.
    2011 IEEE INTERNATIONAL ELECTRON DEVICES MEETING (IEDM), 2011,