Pulse Design Method for Complexity Reduction of IEEE IR-UWB Pulse Synthesizers

被引:0
作者
Artemio-Schoulten, F. [1 ]
Vauche, R. [2 ]
Bourdel, S. [1 ]
Muhr, E. [2 ]
Gaubert, J. [2 ]
Dehaese, N. [2 ]
Hameau, F. [3 ]
Barthelemy, H. [2 ]
机构
[1] Univ Grenoble Alpes, RFIC Lab, Grenoble INP, F-38000 Grenoble, France
[2] Aix Marseille Univ, Univ Toulon, IM2NP, CNRS, Marseille, France
[3] CEA, LETI, MINATEC Campus, F-38054 Grenoble, France
来源
2020 27TH IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS AND SYSTEMS (ICECS) | 2020年
关键词
IEEE; 802.15.4; standard; 802.15.6; Impulse-Radio Ultra-WideBand; pulse shaping; pulse synthesizer; CMOS TRANSCEIVER; TRANSMITTER;
D O I
10.1109/icecs49266.2020.9294788
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper presents a sample & hold pulse envelope synthesis method and shows that only 5 (resp. 7) samples are necessary to respect the sidelobes rejection in adjacent channels of 18dB (resp. 20dB) required by the IEEE 802.15.4 (resp. 802.15.6) standard if a sample & hold Gaussian envelope is used. These required numbers of samples, which enable complexity reduction of IR-UWB emitters for IEEE standards, are validated using measurement results of a pulse synthesizer presented in this paper since a sidelobes rejection in adjacent channels of 21.8dB (resp. 21.4dB) is obtained when transmitting in the mandatory low band of the IEEE 802.15.4 (resp. 802.15.6) standard.
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页数:4
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