An asymmetrical multilevel inverter topology with reduced source count

被引：0
作者：
Reddy, K. Raghavendra [1 ]
Sabyasachi, Sidharth [1 ]
Meshram, P. M. [2 ]
Borghate, V. B. [1 ]
机构：
[1] Visvesvaraya Natl Inst Technol, Dept Elect Engn, Nagpur, Maharashtra, India
[2] Yeshwantrao Chavan Coll Engn, Dept Elect Engn, Nagpur, Maharashtra, India
来源：
2016 IEEE STUDENTS' CONFERENCE ON ELECTRICAL, ELECTRONICS AND COMPUTER SCIENCE (SCEECS) | 2016年
关键词：
Multilevel inverters; Asymmetrical topologies; Total harmonic distortion; H-bridge; H-BRIDGE INVERTER; INDUSTRIAL APPLICATIONS; MODULATION TECHNIQUE; CONVERTER; SYSTEM; NUMBER; PERFORMANCE; SWITCHES;
D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
In this paper, an asymmetrical topology for cascaded multilevel inverter based on basic converter unit, series unit and full-bridge is proposed. It offers lower total harmonic distortion, switching losses and voltage stress on switches than conventional inverters. An algorithm to determine dc voltage sources magnitudes is proposed. The gating signals for the power switches are generated by employing Nearest Level Control (NLC) method. This structure allows a reduction of the system cost and size. Effectiveness of the proposed topology has been demonstrated by analysis and simulation.
引用
收藏
页数：6
相关论文
共 26 条
  • [11] Analysis of an asymmetric modulation method for cascaded multilevel inverters
    Ding, K.
    Cheng, K. W. E.
    Zou, Y. P.
    [J]. IET POWER ELECTRONICS, 2012, 5 (01) : 74 - 85
  • [12] A New Modulation Method for a 13-Level Asymmetric Inverter Toward Minimum THD
    Espinosa, Eduardo E.
    Espinoza, Jose R.
    Melin, Pedro E.
    Ramirez, Roberto O.
    Villarroel, Felipe
    Munoz, Javier A.
    Moran, Luis
    [J]. IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, 2014, 50 (03) : 1924 - 1933
  • [13] Symmetric and asymmetric transformer based cascaded multilevel inverter with minimum number of components
    Farakhor, Amir
    Ahrabi, Rouzbeh Reza
    Ardi, Hossein
    Ravadanegh, Sajad Najafi
    [J]. IET POWER ELECTRONICS, 2015, 8 (06) : 1052 - 1060
  • [14] Cascaded Multilevel Converter-Based Transmission STATCOM: System Design Methodology and Development of a 12 kV ± 12 MVAr Power Stage
    Gultekin, Burhan
    Ermis, Muammer
    [J]. IEEE TRANSACTIONS ON POWER ELECTRONICS, 2013, 28 (11) : 4930 - 4950
  • [15] Multilevel Inverter Topologies With Reduced Device Count: A Review
    Gupta, Krishna Kumar
    Ranjan, Alekh
    Bhatnagar, Pallavee
    Sahu, Lalit Kumar
    Jain, Shailendra
    [J]. IEEE TRANSACTIONS ON POWER ELECTRONICS, 2016, 31 (01) : 135 - 151
  • [16] Comprehensive review of a recently proposed multilevel inverter
    Gupta, Krishna Kumar
    Jain, Shailendra
    [J]. IET POWER ELECTRONICS, 2014, 7 (03) : 467 - 479
  • [17] A Single-Phase Multilevel Inverter Using Switched Series/Parallel DC Voltage Sources
    Hinago, Youhei
    Koizumi, Hirotaka
    [J]. IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, 2010, 57 (08) : 2643 - 2650
  • [18] A High-Frequency Link Multilevel Cascaded Medium-Voltage Converter for Direct Grid Integration of Renewable Energy Systems
    Islam, Md. Rabiul
    Guo, Youguang
    Zhu, Jianguo
    [J]. IEEE TRANSACTIONS ON POWER ELECTRONICS, 2014, 29 (08) : 4167 - 4182
  • [19] Recent Advances and Industrial Applications of Multilevel Converters
    Kouro, Samir
    Malinowski, Mariusz
    Gopakumar, K.
    Pou, Josep
    Franquelo, Leopoldo G.
    Wu, Bin
    Rodriguez, Jose
    Perez, Marcelo A.
    Leon, Jose I.
    [J]. IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, 2010, 57 (08) : 2553 - 2580
  • [20] Optimized Space Vector Pulse-width Modulation Technique for a Five-level Cascaded H-Bridge Inverter
    Matsa, Amarendra
    Ahmed, Irfan
    Chaudhari, Madhuri A.
    [J]. JOURNAL OF POWER ELECTRONICS, 2014, 14 (05) : 937 - 945
123