Cell multiprocessor communication network: Built for speed

被引：175
作者：
Kistler, Michael
Perrone, Michael
Petrini, Fabrizio
机构：
[1] Pacific NW Natl Lab, Appl Comp Sci Grp, Computat Sci & Math Div, Richland, WA 99352 USA
[2] IBM Corp, TJ Watson Res Ctr, Yorktown Hts, NY USA
来源：
IEEE MICRO | 2006年 / 26卷 / 03期
关键词：
D O I：
10.1109/MM.2006.49
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
Multicore designs promise various power-performance and area performance benefits. But inadequate design of the on-chip communication network can deprive applications of these benefits. To illuminate this important point in multicore processor design, the authors analyze the cell processor's communication network, using a series of benchmarks involving various DMA traffic patterns and synchronization protocols.
引用
收藏
页码：10 / 23
页数：14
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