Optical and electrical evaluations of SiGe layers on insulator fabricated using Ge condensation by dry oxidation

被引:6
作者
Wang, Dong [1 ]
Nakashima, Hiroshi [1 ]
机构
[1] Kyushu Univ, Art Sci & Technol Ctr Cooperat Res, Fukuoka 8168580, Japan
关键词
SiGe-on-insulator; Ge condensation; Defect; Photoluminescence; DLTS; Wafer quality mapping; ON-INSULATOR; STRAIN RELAXATION; PHOTOLUMINESCENCE; SILICON; SUBSTRATE; DEFECTS;
D O I
10.1016/j.sse.2009.04.021
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Photoluminescence (PL) and dual-metal-oxide-semiconductor (dual-MOS) deep level transient spectroscopy (DLTS) evaluations were performed for SiGe layers on insulator fabricated using Ge condensation by dry oxidation. Defect generation and transformation during the temperature ramp-up process were studied by PL. Band-band transition PL peaks were clearly observed for the as-grown wafers and the peak intensities decreased with an increase in the target temperature (T-t). Defect-related PL signals were observed at around 0.82, 0.88, 0.95, and 1.0 eV, which varied according to T-t and the SiGe thickness. The dependence of defect-related PL on T-t consists with that the defect generation of misfit-dislocation and transformation to stacking-faults with increasing T-t, which was conformed by transmission electron microscopy. After Ge condensation by dry oxidation, four strained Si/SiGe on insulator (SSGOI) wafers having different Ge fractions (Ge%) and Ge condensation temperatures (T-c) were evaluated using PL and dual-MOS DLTS methods. For the sample with Ge% = 20% and T-c = 1200 degrees C, a broad defect-related PL signal could be observed. Other SSGOI samples showed deep-level-free PL signal in the energy range from 0.77 eV to band gap, implying high wafer qualities. At mid-gap, the interface states densities (D-it) of wafers with Ge% = 15% and 20% were approximately 5 x 10(11) and 1 x 10(12) cm(-2) eV(-1), respectively, which were higher than that of Si/buried oxide (BOX) in a Si on insulator wafer. The high D-it of SiGe/ BOX was not due to interface roughness but due to the weakness of Ge-O bonds. No deep traps with concentration great than 3 x 10(11) cm(-3) were detected by dual-MOS DLTS measurement in the energy range of from 0.07 to 0.24 eV above the top of valence band. Based on the PL and dual-MOS DLTS evaluations, wafer quality dependences on Ge condensation parameters were discussed. One-dimensional mappings for SiGe layer crystallinity by band-band PL intensity and D-it by dual-MOS DLTS were also performed from center to edge for all the SSGOI wafers. (C) 2009 Elsevier Ltd. All rights reserved.
引用
收藏
页码:841 / 849
页数:9
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