Performance and reliability of single halo deep sub-micron p-MOSFETs for analog applications

被引：6

作者：

Jha, NK ^{[1
]}

Baghini, MS ^{[1
]}

Rao, VR ^{[1
]}

机构：

[1] Indian Inst Technol, Dept Elect Engn, Bombay 400076, Maharashtra, India

来源：

PROCEEDINGS OF THE 9TH INTERNATIONAL SYMPOSIUM ON THE PHYSICAL & FAILURE ANALYSIS OF INTEGRATED CIRCUITS | 2002年

关键词：

D O I：

10.1109/IPFA.2002.1025608

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

The effect of Channel Hot carrier (CHC) stress under typical analog operating conditions is studied for the first time for single halo (SH) p-MOSFET devices. The SH devices show less degradation under identical operating conditions compared to conventional MOSFETs. The effect of SH implant parameters on device degradation is presented.

引用

页码：35 / 39

页数：5

共 7 条

[1]

BORSE DG, UNPUB IEEE T ELECT D

[2]

CHENG B, 1998, 28 EUR SOL STAT DEV

[3] Analog device design for low power mixed mode applications in deep submicron CMOS technology [J].

Deshpande, HV ;

Cheng, BH ;

Woo, JCS .

IEEE ELECTRON DEVICE LETTERS, 2001, 22 (12) :588-590

[4] Potential design and transport property of 0.1-mu m MOSFET with asymmetric channel profile [J].

Odanaka, S ;

Hiroki, A .

IEEE TRANSACTIONS ON ELECTRON DEVICES, 1997, 44 (04) :595-600

[5] Effects of hot-carrier degradation in analog CMOS circuits [J].

Thewes, R ;

Weber, W .

MICROELECTRONIC ENGINEERING, 1997, 36 (1-4) :285-292

[6] Hot-carrier degradation of p-MOSFET's under analog operation [J].

Thewes, R ;

Brox, M ;

Goser, KF ;

Weber, W .

IEEE TRANSACTIONS ON ELECTRON DEVICES, 1997, 44 (04) :607-617

[7] Application of charge pumping technique for sub-micron MOSFET characterization [J].

Viswanathan, CR ;

Rao, VR .

MICROELECTRONIC ENGINEERING, 1998, 40 (3-4) :131-146

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