A new small swing domino logic for low-power consumption

被引：0

作者：

Yang, SH ^{[1
]}

Cho, KR ^{[1
]}

机构：

[1] Chungbuk Natl Univ, Dept Comp & Commun Engn, Commun Circuit & Syst Design Lab, Choengju, South Korea

来源：

MICROELECTRONICS: DESIGN, TECHNOLOGY, AND PACKAGING | 2004年 / 5274卷

关键词：

small-swing domino logics; low-power circuits; multipliers;

D O I：

10.1117/12.544524

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

In this paper, we propose new small swing domino logic for low-power consumption. To reduce the power consumption, both the precharge node and the output node swing the range from 0 to V-REF-V-THN, where V-REF=VDD-nV(THN). This can be done by the inverter structure that allows a full swing or a small swing on its input terminal without leakage current. Compared to the small swing domino circuit of the previous works, the proposed structure can save the power consumption of more than 30% for n = 1, 2, and 3 in the equation of V-REF= VDD-nV(THN).

引用

页码：303 / 309

页数：7

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