All-optical parallel parity generator circuit with the help of semiconductor optical amplifier (SOA)-assisted Sagnac switches

被引:15
作者
Bhattacharyya, Arunava [1 ]
Gayen, Dilip Kumar [2 ]
Chattopadhyay, Tanay [3 ]
机构
[1] Coll Engn & Management, Dept Informat Technol, Kolaghat, India
[2] Coll Engn & Management, Dept Comp Sci & Engn, Purba Medinipur 721137, W Bengal, India
[3] WBPDCL, Kolaghat Thermal Power Stn, Purba Medinipur 721137, W Bengal, India
关键词
Parity generator; Terahertz optical asymmetric demultiplexer; Optical switch; Semiconductor optical amplifier; SIGNED-DIGIT; COMPLEMENT REPRESENTATION; THEORETICAL-ANALYSIS; LASER AMPLIFIER; BOOLEAN XOR; LOOP MIRROR; INTERFEROMETER; CONVERSION; CHECKER; TOAD;
D O I
10.1016/j.optcom.2013.09.042
中图分类号
O43 [光学];
学科分类号
070207 ; 0803 ;
摘要
In digital signal processing, the parity bits are frequently used to detect errors during transmission of binary information. A parity bit is an extra bit included with a binary message to make the number of l's either odd or even. The message including the parity bit is transmitted and then checked at the receiving end for errors. The circuit that generates the parity bit in the transmitter end is called a parity generator and the circuit that checks the parity in the receiver is called a parity checker. In this paper, all-optical parallel scheme of parity generator has been proposed with the help of semiconductor optical amplifier (SOA)-assisted Sagnac gate. The operations of the circuit is studied theoretically and analyzed through numerical simulations. It explains the scope of the research and principal findings. (c) 2013 Elsevier B.V. All rights reserved.
引用
收藏
页码:99 / 105
页数:7
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