Signal Estimation Method for Folding ADCs in Wideband Multistandard SWR Receivers

This paper proposes a signal estimator embedded in folding analog-to-digital converter (ADC) for digitizing a variety of analog signals occupying significantly different bandwidths and considerable power difference, which are simultaneously received by a wideband multistandard software radio (SWR) receivers. The high-power narrowband signals are predicted by signal estimator using modern power spectrum estimation method from the past samples digitized by coarse flash converter of folding ADC. The folding ADC digitizes the composite received signals after canceling the estimated signal. It is shown theoretically and by means of computer simulations that this method can effectively improve the ADC resolution. Furthermore, the high speed is maintained by the folding structure as the estimation decision has been accurately predicted before the digitization of folding ADC. The overall SNR improvement is specified by the prediction gain. When this method was brought into 8-bit folding ADC in 0.18 um CMOS as an example, the various performance evaluation results obtained by means of computer simulations show that it can achieve 12-bit resolution at 200 MSample/s conversion rate, which justify the validity of the proposed method.