Impact of interface trap charge and temperature on the performance of epitaxial layer tunnel field effect transistor

被引：11
作者：
Debnath, Radhe Gobinda [1 ]
Baishya, Srimanta [1 ]
机构：
[1] Natl Inst Technol Silchar, Dept Elect & Commun Engn, Silchar 788010, Assam, India
来源：
MICROELECTRONICS JOURNAL | 2022年 / 120卷
关键词：
TFET; Interface trap charge (ITC); Temperature sensitivity; Vertical BTBT; Epitaxial layer; FET; GATE; SIMULATION; TECHNOLOGY;
D O I：
10.1016/j.mejo.2021.105348
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
A simulation study of the impact of interface traps on the performance of the Epitaxial Layer Tunnel Field Effect Transistor (ETLTFET) having Si(1-x)Gex as source material is investigated in terms of interface Trap distribution, energies, random trap fluctuation (RTF), and temperature in comparison with FinFET. The study revealed a similar trend of Vth shift for ETLTFET and FinFET for a given trap type. For both ETLTFET and FinFET, the donor interface trap with energy above the semiconductor mid band gap can cause a shift in I-ON as well as I-OFF, while the acceptor interface trap has a comparatively wider energy range. Again, trap induced SS degradation is minor in ETLTFET than its counterparts. In the case of RTF in nano-scaled devices, the fluctuations in ION and Vth induced by interface traps are found to vary with the position of the trap, and the variations at ETLTFET are relatively more minor than the FinFET. Furthermore, the presence of interface trap charges alters the device's temperature sensitivity which could be detrimental for the device to be utilized in sensor applications.
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页数：8
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