Impact of interface trap charge and temperature on the performance of epitaxial layer tunnel field effect transistor

被引:11
作者
Debnath, Radhe Gobinda [1 ]
Baishya, Srimanta [1 ]
机构
[1] Natl Inst Technol Silchar, Dept Elect & Commun Engn, Silchar 788010, Assam, India
来源
MICROELECTRONICS JOURNAL | 2022年 / 120卷
关键词
TFET; Interface trap charge (ITC); Temperature sensitivity; Vertical BTBT; Epitaxial layer; FET; GATE; SIMULATION; TECHNOLOGY;
D O I
10.1016/j.mejo.2021.105348
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A simulation study of the impact of interface traps on the performance of the Epitaxial Layer Tunnel Field Effect Transistor (ETLTFET) having Si(1-x)Gex as source material is investigated in terms of interface Trap distribution, energies, random trap fluctuation (RTF), and temperature in comparison with FinFET. The study revealed a similar trend of Vth shift for ETLTFET and FinFET for a given trap type. For both ETLTFET and FinFET, the donor interface trap with energy above the semiconductor mid band gap can cause a shift in I-ON as well as I-OFF, while the acceptor interface trap has a comparatively wider energy range. Again, trap induced SS degradation is minor in ETLTFET than its counterparts. In the case of RTF in nano-scaled devices, the fluctuations in ION and Vth induced by interface traps are found to vary with the position of the trap, and the variations at ETLTFET are relatively more minor than the FinFET. Furthermore, the presence of interface trap charges alters the device's temperature sensitivity which could be detrimental for the device to be utilized in sensor applications.
引用
收藏
页数:8
相关论文
共 45 条
[1]   Double-gate tunnel FET with high-κ gate dielectric [J].
Boucart, Kathy ;
Mihai Ionescu, Adrian .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 2007, 54 (07) :1725-1733
[2]   Impact of interface trap charges on dopingless tunnel FET for enhancement of linearity characteristics [J].
Chandan, Bandi Venkata ;
Nigam, Kaushal ;
Sharma, Dheeraj ;
Pandey, Sunil .
APPLIED PHYSICS A-MATERIALS SCIENCE & PROCESSING, 2018, 124 (07)
[3]   A Compact Model for Threshold Voltage of Surrounding-Gate MOSFETs With Localized Interface Trapped Charges [J].
Chiang, Te-Kuang .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 2011, 58 (02) :567-571
[4]   Tunneling field-effect transistors (TFETs) with subthreshold swing (SS) less than 60 mV/dec [J].
Choi, Woo Young ;
Park, Byung-Gook ;
Lee, Jong Duk ;
Liu, Tsu-Jae King .
IEEE ELECTRON DEVICE LETTERS, 2007, 28 (08) :743-745
[5]   Heteromaterial gate tunnel field effect transistor with lateral energy band profile modulation [J].
Cui, Ning ;
Liang, Renrong ;
Xu, Jun .
APPLIED PHYSICS LETTERS, 2011, 98 (14)
[6]   Tunnel FET technology: A reliability perspective [J].
Datta, Suman ;
Liu, Huichu ;
Narayanan, Vijaykrishnan .
MICROELECTRONICS RELIABILITY, 2014, 54 (05) :861-874
[7]   Impact of source-doping gradient in terms of lateral straggle on the performance of germanium epitaxial layer double-gate TFET [J].
Debnath, Radhe Gobinda ;
Baishya, Srimanta .
APPLIED PHYSICS A-MATERIALS SCIENCE & PROCESSING, 2020, 126 (11)
[8]   Temperature impact on the tunnel fet off-state current components [J].
Der Agopian, Paula Ghedini ;
Martino, Marcio Dalla Valle ;
dos Santos Filho, Sebastiao Gomes ;
Martino, Joao Antonio ;
Rooyackers, Rita ;
Leonelli, Daniele ;
Claeys, Cor .
SOLID-STATE ELECTRONICS, 2012, 78 :141-146
[9]   Analysis of Single-Trap-Induced Random Telegraph Noise and its Interaction With Work Function Variation for Tunnel FET [J].
Fan, Ming-Long ;
Hu, Vita Pi-Ho ;
Chen, Yin-Nein ;
Su, Pin ;
Chuang, Ching-Te .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 2013, 60 (06) :2038-2044
[10]   Tunneling Field-Effect Transistor: Effect of Strain and Temperature on Tunneling Current [J].
Guo, Peng-Fei ;
Yang, Li-Tao ;
Yang, Yue ;
Fan, Lu ;
Han, Gen-Quan ;
Samudra, Ganesh S. ;
Yeo, Yee-Chia .
IEEE ELECTRON DEVICE LETTERS, 2009, 30 (09) :981-983