An Energy-Efficient ECG Processor With Weak-Strong Hybrid Classifier for Arrhythmia Detection

This brief presents an energy-efficient electrocardiogram processor for arrhythmia detection with a weak-strong hybrid classifier that includes a weak linear classifier (WLC) and a strong support vector machine (SVM) classifier. WLC can only identify the beats with distinct characteristics by performing simple threshold comparisons based on beat interval feature and a novel morphology feature named QRS area ratio. The beats that are unclassified by WLC will activate the more powerful but energy-guzzling SVM classifier. Principal component analysis (PCA) is applied for feature dimension reduction to lower the complexity of SVM classifier and a sparse matrix computing architecture is exploited to reduce the computation burden of PCA. Implemented in SMIC 40LL CMOS process, the processor has a total area of 0.12 mm(2). It achieves 1.98-uW power consumption in WLC mode and 3.76-uW in SVM mode under 1.1-V voltage supply and 10-KHz operating frequency, with energy dissipation of 6.8/30.3 nJ per beat classification for the two modes, respectively. The overall accuracy for MIT-BIH arrhythmia database is 98.2% with energy reduction of 41.7% compared to a single SVM classifier.