A Low Power 6-bit Flash ADC With Reference Voltage and Common-Mode Calibration

被引：49
作者：
Chen, Chun-Ying [1 ]
Le, Michael Q. [1 ]
Kim, Kwang Young [1 ]
机构：
[1] Broadcom Corp, Irvine, CA 92618 USA
来源：
IEEE JOURNAL OF SOLID-STATE CIRCUITS | 2009年 / 44卷 / 04期
关键词：
Analog-to-digital (A/D) conversion; calibration; mixed analog-digital integrated circuits; offset cancellation;
D O I：
10.1109/JSSC.2009.2014701
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
In this paper, a low power 6-bit ADC that uses reference voltage and common-mode calibration is presented. A method for adjusting the differential and common-mode reference voltages used by the ADC to improve its linearity is described. Power dissipation is reduced by using small device sizes in the ADC and relying on calibration to cancel the large non-ideal offsets due to device mismatches. The ADC occupies 0.13 mm(2) in 65 nm CMOS and dissipates 12 mW at. a sample rate of 800 MS/s from a 1.2 V supply.
引用
收藏
页码：1041 / 1046
页数：6
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