Low-complexity bit-parallel multiplier over GF(2m) using dual basis representation

Recently, cryptographic applications based on finite fields have attracted much attention. The most demanding finite field arithmetic operation is multiplication. This investigation proposes a new multiplication algorithm over GF(2(m)) using the dual basis representation. Based on the proposed algorithm, a parallel-in parallel-out systolic multiplier is presented. The architecture is optimized in order to minimize the silicon covered area (transistor count). The experimental results reveal that the proposed bit-parallel multiplier saves about 65% space complexity and 33% time complexity as compared to the traditional multipliers for a general polynomial and dual basis of GF(2(m)).