The Impact of La-doping on the Reliability of Low Vth High-k/Metal Gate nMOSFETs under Various Gate Stress Conditions

被引：0
|
作者：
Kang, C. Y. [1 ]
Young, C. D. [1 ]
Huang, J. [1 ]
Kirsch, P. [1 ]
Heh, D. [1 ]
Sivasubramani, P. [1 ]
Park, H. K. [1 ]
Bersuker, G. [1 ]
Lee, B. H. [1 ]
Choi, H. S. [2 ]
Lee, K. T. [2 ]
Jeong, Y-H. [2 ]
Lichtenwalner, J. [3 ]
Kingon, A. I. [3 ]
Tseng, H-H [1 ]
Jammy, R. [1 ]
机构：
[1] SEMATECH, 2706 Montopolis Dr, Austin, TX 78741 USA
[2] Pohang Univ Sci & Technol, Dept Elect Engn, Pohang, South Korea
[3] N Carolina State Univ, Dept Mat Sci & Engn, Raleigh, NC 27695 USA
来源：
IEEE INTERNATIONAL ELECTRON DEVICES MEETING 2008, TECHNICAL DIGEST | 2008年
关键词：
D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
La-doped HfSiO samples show lower threshold voltage (V-th) and gate current (I-gate), which is attributed to dipole formation at the high-k/SiO2 interface. At low and intermediate field stress, La-doped devices exhibit better immunity to positive bias temperature instability (PBTI) due to their lower charge trapping efficiency than the control HfSiO, which mainly results from a dipole-induced greater barrier offset. However, the primary cause for defect generation at high field stress is attributed to the La atoms in the interfacial SiO2 layer. By optimizing the technique to incorporate nitrogen into the bottom interface, this high field reliability issue can be minimized while maintaining good device
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页码：115 / +
页数：3
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