A new designed trench structure to reduce the wafer warpage in wafer level packaging process

被引:0
作者
Zhu, Chunsheng [1 ,2 ]
Lee, Heng [1 ,2 ]
Ye, Jiaotuo [1 ,2 ]
Xu, Gaowei [1 ]
Luo, Le [1 ]
Zhu, Chunsheng [1 ,2 ]
Lee, Heng [1 ,2 ]
Ye, Jiaotuo [1 ,2 ]
机构
[1] Chinese Acad Sci, Shanghai Inst Microsyst & Informat Technol, State Key Lab Transducer Technol, Shanghai 200050, Peoples R China
[2] Univ Chinese Acad Sci, Beijing 100049, Peoples R China
来源
2014 15TH INTERNATIONAL CONFERENCE ON ELECTRONIC PACKAGING TECHNOLOGY (ICEPT) | 2014年
关键词
wafer level packaging; wafer warpage; trench structure; RELIABILITY;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Wafer warpage in wafer level packaging process poses threats to wafer handling, process qualities, and can also lead to unacceptable reliability problems. With larger diameter wafer adopted, this issue becomes more serious. In the paper, a new designed trench structure was introduced in WLP process to reduce the final wafer warpage. Both experiment and simulation methods are used to investigated the effect of the trenches on the wafer warpage. The result indicates that, by forming deep trenches, the stress of individual dies is decoupled and the total the wafer warpage will be decreased. The effect of the geometry of these trenches on the mechanical behavior of the wafer was further studied by simulation.
引用
收藏
页码:606 / 609
页数:4
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