Power-Noise Measurements of Small-Scale Inverter Chains

被引：0

作者：

Harada, Yuji ^{[1
]}

Yoshikawa, Kumpei ^{[1
]}

Miura, Noriyuki ^{[1
]}

Nagata, Makoto ^{[1
]}

Murata, Akitaka ^{[2
]}

Agatsuma, Syuji ^{[2
]}

Ichikawa, Kouji ^{[2
]}

机构：

[1] Kobe Univ, Grad Sch Syst Informat, Nada Ku, 1-1 Rokkodai, Kobe, Hyogo 6578501, Japan

[2] DENSO Corp, Kariya, Aichi, Japan

来源：

2013 IEEE INTERNATIONAL MEETING FOR FUTURE OF ELECTRON DEVICES, KANSAI (IMFEDK2013) | 2013年

关键词：

Power integrity; On chip measurement; Power supply noise;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This paper presents the measurements of power noise (V-dd noise) waveforms of a 5-stage inverter chain, using on-chip noise monitor circuits (OCM). The fine resolution of 0.4 mV in voltage and 12.5 ps in timing are realized. The undesired voltage variation by signal buffers in I/O cells is carefully eliminated by three means; (i) isolation of power domains, (ii) subtraction of background noise waveforms, and (iii) averaging iteratively captured waveforms.

引用

页数：2