Extrinsic Information Transfer Charts for Characterizing the Iterative Decoding Convergence of Fully Parallel Turbo Decoders

Fully parallel turbo decoders (FPTCDs) have been shown to offer a more-than-sixfold processing throughput and latency improvement over the conventional logarithmic Bahl-Cocke-Jelinek-Raviv (Log-BCJR) turbo decoders. Rather than requiring hundreds or even thousands of time periods to decode each frame, such as the conventional Log-BCJR turbo decoders, the FPTD completes each decoding iteration using only one or two time periods, although up to six times as many decoding iterations are required to achieve the same error correction performance. Until now, it has not been possible to explain this increased iteration requirement using an extrinsic information transfer (EXIT) chart analysis, since the two component decoders are not alternately operated in the FPTD. Hence, in this paper, we propose a novel EXIT chart technique for characterizing the iterative exchange of not only extrinsic logarithmic likelihood ratios in the FPTD, but also the iterative exchange of extrinsic state metrics. In this way, the proposed technique can accurately predict the number of decoding iterations required for achieving iterative decoding convergence, as confirmed by the Monte Carlo simulation. The proposed technique offers new insights into the operation of FPTDs, which will facilitate improved designs in the future, in the same way as the conventional EXIT charts have enhanced the design and understanding of the conventional Log-BCJR turbo decoders.