A Single-PLL UWB Frequency Synthesizer Using Multiphase Coupled Ring Oscillator and Current-Reused Multiplier

被引：4

作者：

Chang, Jung-Yu ^{[1
]}

Fan, Che-Wei

Liang, Che-Fu

Liu, Shen-Iuan

机构：

[1] Natl Taiwan Univ, Grad Inst Elect Engn, Taipei 10617, Taiwan

来源：

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS | 2009年 / 56卷 / 02期

关键词：

Current reused; multiply-by-1.5; circuit; phase-locked loop (PLL); ring oscillator ultrawideband (UWB);

D O I：

10.1109/TCSII.2008.2010181

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A single phase-locked loop (PLL) frequency synthesizer for a Mode-1 multiband orthogonal frequency-division multiplexing (MB-OFDM) ultrawideband (UWB) system is realized in 0.13-mu m CMOS. A current-reused multiply-by-1.5 circuit and a multiphase coupled ring oscillator are adopted to reduce the power consumption. For a 4.488-GHz signal, the measured image sideband is -40 dBc. The measured switching time from 3.342 to 4.488 GHz is 1.5 ns. The area is 0.85 X 0.9 mm(2) and the power is 31.2 mW for a 1.2-V supply voltage.

引用

页码：107 / 111

页数：5