Package characterization and development of a flip chip QFN package: fcMLF

This paper describes the performance of a low cost molded package using flip chip interconnections on a copper lead frame substrate. Two flip chip interconnect metallurgies were evaluated: High Pb bumps attached to the lead frame using eutectic Sn37Pb solder paste Au bumps attached to the leadframe using eutectic Sn3.5Ag solder paste This package format is identified as the Flip Chip MicroLeadframe (fcMLF) package family (QFN) in this presentation. Temperature cycle, HAST, Storage, and MRT testing were performed. All reliability requirements were achieved. Level 1 260degreesC J-STD-020A moisture classification was achieved. This fcMLF package was also evaluated with and without an exposed thermal pad. Electrical model simulations were completed showing the package was applicable for use up to 40GHz, depending upon die to package size ratio. Thermal models were completed that demonstrated thermal dissipation of 35degreesC/W theta JA for a 4.00 x 4.00 mm body size with an exposed pad.