High-current, NO-annealed lateral 4H-SiC MOSFETs

The effectiveness of using NO annealed silicon dioxide as a gate dielectric for 4H-SiC MOSFETs is investigated. The NO annealed devices show greater channel mobility than un-nitrided devices, as characterized by both field effect and Hall Effect measurements. The Hall Effect measurement also corroborates the reduced interface state density near the conduction band measured for n-type MOS capacitors. Furthermore, the NO passivation is uniform across the wafer, independent of the channel orientation in the c-plane, and only slightly reduced due to the presence of an ion implanted p-well. All of this allows us to scale up to large 2 area devices capable of delivering 2 A of current with a specific on-resistance of 10.3 mOmega-cm(2).