Defects Generation under Constant Voltage Stress in La2O3/HfO2 Gate Stacks Grown on Ge Substrates

被引：3

作者：

Evangelou, E. K. ^{[1
]}

Rahman, M. S. ^{[1
]}

Dimoulas, A. ^{[2
]}

Galata, S. ^{[2
]}

机构：

[1] Univ Ioannina, Dept Phys, POB 1186, GR-45110 Ioannina, Greece

[2] NCSR, Inst Sci Mat, Athens 15310, Greece

来源：

PHYSICS AND TECHNOLOGY OF HIGH-K GATE DIELECTRICS 7 | 2009年 / 25卷 / 06期

关键词：

INDUCED LEAKAGE CURRENT; BORDER TRAPS; TIME-DECAY; DIELECTRICS; SILC;

D O I：

10.1149/1.3206611

中图分类号：

O646 [电化学、电解、磁化学];

学科分类号：

081704 ;

摘要：

We report on the defect generation under constant voltage stress in La2O3/HfO2 gate stacks grown on Germanium (001) substrates by molecular beam deposition utilizing a stress and sense technique. A voltage range from 0.5V up to 2.4V was used for the measurements. At low applied gate voltages, the stress induced current decrease could be explained by a field lowering model due to charge trapping, while at higher voltages the generation of shallow traps in the Lanthanum oxide layer becomes more important.

引用

页码：105 / 111

页数：7

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