Soft error rate mitigation techniques for modern microcircuits

被引：238

作者：

Mavis, DG ^{[1
]}

Eaton, PH ^{[1
]}

机构：

[1] Mission Res Corp, Albuquerque, NM 87110 USA

来源：

40TH ANNUAL PROCEEDINGS: INTERNATIONAL RELIABILITY PHYSICS SYMPOSIUM | 2002年

关键词：

radiation hardening; soft error; SER; upset; SEU; transient; SET; temporal sampling; latch;

D O I：

10.1109/RELPHY.2002.996639

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A unique circuit hardening technique is described, which can totally eliminate both alpha and neutron induced soft errors from deep submicron microcircuits. This hardening technique, termed temporal sampling, addresses both traditional static latch SEUs (single event upsets) as well as SET (single event transient) induced errors. This approach mitigates the SER (soft error rate) of modem microcircuits with minimal impact on design flow, physical layout area, and circuit performance.

引用

页码：216 / 225

页数：10

共 20 条

[1] Attenuation of single event induced pulses in CMOS combinational logic [J].