Compact Modeling of Nanoscale Trapezoidal FinFETs

被引：26

作者：

Fasarakis, Nikolaos ^{[1
]}

Karatsori, Theano A. ^{[1
]}

Tsormpatzoglou, Andreas ^{[1
]}

Tassis, Dimitrios H. ^{[1
]}

Papathanasiou, Konstantinos ^{[1
]}

Bucher, Matthias ^{[2
]}

Ghibaudo, Gerard ^{[3
]}

Dimitriadis, Charalabos A. ^{[1
]}

机构：

[1] Aristotle Univ Thessaloniki, Thessaloniki 54124, Greece

[2] Tech Univ Crete, Dept Elect & Comp Engn, Khania 73100, Greece

[3] Minatec, IMEP LAHC Lab, F-38016 Grenoble 16, France

来源：

IEEE TRANSACTIONS ON ELECTRON DEVICES | 2014年 / 61卷 / 02期

关键词：

Compact modeling; drain current; nanoscale trapezoidal FinFETs; transcapacitances; TRIPLE-GATE FINFETS; THRESHOLD VOLTAGE; DRAIN CURRENT; SOI MOSFETS; DESIGN;

D O I：

10.1109/TED.2013.2284503

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

An analytical compact model for the drain current of undoped or lightly doped nanoscale FinFETs with trapezoidal cross section is proposed. The compact model of rectangular FinFETs is extended to trapezoidal FinFETs using equivalent nonplanar device parameters and corner effects. The model has been validated by comparing the results with those of 3-D numerical device simulations. The very good accuracy of the drain current and transcapacitances makes the proposed model suitable for implementation in circuit simulation tools.

引用

页码：324 / 332

页数：9

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