FPGA-based expanded circuit design for DSP signal processing

In a digital control system for magnetic bearings, because of factors such as switching currents of a power amplifier, an input signal of the system will be mixed with noise and the signal should be filtered. If the sampling rate of the system for the input signal is not high enough, a filter used will introduce a large delay between its output and input signal. To solve this problem, one way is to sample the input signal multiple times at the beginning of every control period and get a filtered signal by average methods. Then the response speed of the bearing controller would not be influenced. A FPGA-based expanded circuit was designed for this purpose and it was added to a DSP control board as a component of the control platform. Without increasing computational burden of the DSP, the FPGA obtained oversampled signals and processed them by its rich on-chip resources. Meanwhile, in order to view the sampled signals and monitor the system online, the circuit was also equipped with a SDRAM to store the sampled data. This design had a simple structure and reliable performance. Experimental results showed that the circuit could achieve the required signal oversampling and the subsequent data processing and the signal noise was effectively reduced.