共 5 条
- [1] Threshold Voltage Bitmap Analysis Methodology Application to a 512kB 40nm Flash Memory Test Chip 2018 IEEE INTERNATIONAL RELIABILITY PHYSICS SYMPOSIUM (IRPS), 2018,
- [2] Parametric Faults in Computing-in-Memory Applications of a 4kb Read-Decoupled 8T SRAM Array in 40nm CMOS 2023 IEEE INTERNATIONAL TEST CONFERENCE IN ASIA, ITC-ASIA, 2023,
- [4] Impact of flash annealing on performance and reliability of high-κ/metal-gate MOSFETs for sub-45nm CMOS 2007 IEEE INTERNATIONAL ELECTRON DEVICES MEETING, VOLS 1 AND 2, 2007, : 353 - +