STOMA: Simultaneous Template Optimization and Mask Assignment for Directed Self-Assembly Lithography With Multiple Patterning

被引：8

作者：

Kuang, Jian ^{[1
]}

Ye, Junjie ^{[1
]}

Young, Evangeline F. Y. ^{[1
]}

机构：

[1] Chinese Univ Hong Kong, Dept Comp Sci & Engn, Hong Kong, Hong Kong, Peoples R China

来源：

IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS | 2018年 / 37卷 / 06期

关键词：

Design for manufacturability; directed self-assembly (DSA); lithography; mask assignment; multiple patterning; LAYOUT DECOMPOSITION; CONTACT LAYER; DSA;

D O I：

10.1109/TCAD.2017.2748022

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

Block copolymer directed self-assembly (DSA) is a promising technique to print contacts/vias for the 10 nm technology node and beyond. By using hybrid lithography that incorporates DSA with multiple patterning, multiple masks are used to print the DSA templates and then the templates can be used to guide the self-assembly of the block copolymer. In this paper, we propose approaches to solve the simultaneous template optimization and mask assignment problem for DSA with multiple patterning. We verified in experiments that our approaches remarkably outperform the state-of-the-art work in reducing the manufacturing cost.

引用

页码：1251 / 1264

页数：14

共 24 条

[1]

[Anonymous], 1978, P 10 ANN ACM S THEOR, DOI DOI 10.1145/800133.804355

[2]

[Anonymous], 2004, J. Graph Algorithms App., DOI [DOI 10.7155/JGAA.00091, DOI 10.7155/jgaa.00091]

[3] Incorporating DSA in multipatterning semiconductor manufacturing technologies [J].

Badr, Yasmine ;

Torres, J. Andres ;

Ma, Yuansheng ;

Mitra, Joydeep ;

Gupta, Puneet .

DESIGN-PROCESS-TECHNOLOGY CO-OPTIMIZATION FOR MANUFACTURABILITY IX, 2015, 9427

[4]

Badr Yasmine., 2015, Design Automation Conference (DAC), 2015 52nd ACM/EDAC/IEEE, P1

[5]

Du YL, 2013, ICCAD-IEEE ACM INT, P186, DOI 10.1109/ICCAD.2013.6691117

[6] ANALYSIS OF HEURISTICS FOR FINDING A MAXIMUM WEIGHT PLANAR SUBGRAPH [J].

DYER, ME ;

FOULDS, LR ;

FRIEZE, AM .

EUROPEAN JOURNAL OF OPERATIONAL RESEARCH, 1985, 20 (01) :102-114

[7] A Novel Layout Decomposition Algorithm for Triple Patterning Lithography [J].

Fang, Shao-Yun ;

Chang, Yao-Wen ;

Chen, Wei-Yu .

IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2014, 33 (03) :397-408

[8]

Jiang K., 2013, Proceedings of the 25th International Conference on Scientific and Statistical Database Management, P1

[9] ON GENERATING ALL MAXIMAL INDEPENDENT SETS [J].

JOHNSON, DS ;

YANNAKAKIS, M ;

PAPADIMITRIOU, CH .

INFORMATION PROCESSING LETTERS, 1988, 27 (03) :119-123

[10] Layout Decomposition Approaches for Double Patterning Lithography [J].

Kahng, Andrew B. ;

Park, Chul-Hong ;

Xu, Xu ;

Yao, Hailong .

IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2010, 29 (06) :939-952

← 1 2 3 →