A Low-Power Delta-Sigma Capacitance-to-Digital Converter for Capacitive Sensors

This paper proposes a low-power delta-sigma capacitance-to-digital converter (CDC) for a capacitive sensor. The input of the capacitive sensor employs a zoomed-in technique with the offset capacitor to extend the input capacitance range. The proposed CDC uses a third-order switched capacitor delta- sigma modulator to provide a digital output, based on a cascade of integrators with a feed forward (CIFF) structure. The current-starved operational transconductance amplifiers (OTAs) are applied in the delta-sigma modulator's first integrator to improve the current efficiency and reduce the power consumption. An auto-zeroing technique is used in the OTAs to reduce their offset and noise. The circuit was implemented in a 0.18-mu m CMOS technology and occupies an area of 0.496 mm(2). The measurable capacitance range of the CDC can be varied from 0 to 8 pF. In a measurement time of 0.8 ms, the delta-sigma CDC achieved a 12.7 effective number of bits while consuming 18.6-mu A current from a 2-V supply voltage.