Enabling an Integrated Rate-temporal Learning Scheme on Memristor

被引：72

作者：

He, Wei ^{[1
]}

Huang, Kejie ^{[2
]}

Ning, Ning ^{[1
]}

Ramanathan, Kiruthika ^{[1
]}

Li, Guoqi ^{[3
]}

Jiang, Yu ^{[1
]}

Sze, JiaYin ^{[1
]}

Shi, Luping ^{[3
]}

Zhao, Rong ^{[2
]}

Pei, Jing ^{[3
]}

机构：

[1] ASTAR, Data Storage Inst, Singapore 117608, Singapore

[2] Singapore Univ Technol & Design, Singapore 138682, Singapore

[3] Tsinghua Univ, Opt Memory Natl Engn Res Ctr, Dept Precis Instrument, Beijing 100084, Peoples R China

来源：

SCIENTIFIC REPORTS | 2014年 / 4卷

关键词：

TIMING-DEPENDENT PLASTICITY; SYNAPTIC PLASTICITY; SPIKING NEURONS; SYNAPSES; NETWORKS; MODELS; DEVICE; MEMORY; SIZE; LTP;

D O I：

10.1038/srep04755

中图分类号：

O [数理科学和化学]; P [天文学、地球科学]; Q [生物科学]; N [自然科学总论];

学科分类号：

07 ; 0710 ; 09 ;

摘要：

Learning scheme is the key to the utilization of spike-based computation and the emulation of neural/synaptic behaviors toward realization of cognition. The biological observations reveal an integrated spike time-and spike rate-dependent plasticity as a function of presynaptic firing frequency. However, this integrated rate-temporal learning scheme has not been realized on any nano devices. In this paper, such scheme is successfully demonstrated on a memristor. Great robustness against the spiking rate fluctuation is achieved by waveform engineering with the aid of good analog properties exhibited by the iron oxide-based memristor. The spike-time-dependence plasticity (STDP) occurs at moderate presynaptic firing frequencies and spike-rate-dependence plasticity (SRDP) dominates other regions. This demonstration provides a novel approach in neural coding implementation, which facilitates the development of bio-inspired computing systems.

引用

页数：6

共 61 条

[1] Properties and mechanisms of UP maintenance [J].