An analytical subthreshold current modeling of cylindrical gate all around (CGAA) MOSFET incorporating the influence of device design engineering

被引：39
作者：
Pratap, Yogesh [1 ]
Ghosh, Pujarini [1 ]
Haldar, Subhasis [2 ]
Gupta, R. S. [3 ]
Gupta, Mridula [1 ]
机构：
[1] Univ Delhi, Dept Elect Sci, Semicond Device Res Lab, New Delhi 110021, India
[2] Univ Delhi, Motilal Nehru Coll, Dept Phys, New Delhi 110021, India
[3] Maharaja Agrasen Inst Technol, Dept Elect & Commun Engn, Delhi 110086, India
来源：
MICROELECTRONICS JOURNAL | 2014年 / 45卷 / 04期
关键词：
Cylindrical gate all around (CGAA) MOSFET; Short channel effects (SCEs); Dual-material (DM); Triple-material (TM); Graded channel (GC); Gate stack (GS);
D O I：
10.1016/j.mejo.2014.01.015
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
An analytical model of CGAA MOSFET incorporating material engineering, channel engineering and stack engineering has been proposed and verified using ATLAS 3D device simulator. A comparative study of short channel effects for various device structures has also been carried out incorporating the effect of drain induced barrier lowering (DIBL), threshold voltage lowering and degradation of subthreshold slope. The effectiveness of applying the three region doping profile concept in the channel such as high-medium-low and low-high-low and its comparison with Gaussian doping profile to the cylindrical GAA MOSFET has been examined in detail. Reduced SCEs have been evaluated in combined designs i.e. TM-GC-GS, GCGS and DM-GC-GS. Out of several design engineering, GC-GS CGAA gives nearly ideal subthreshold slope whereas TM-GC-GS CGAA provides overall superior performance to reduce SCEs in deep nano-meter. The results so obtained are in good agreement with the simulated data which validate the model. (C) 2014 Elsevier Ltd. All rights reserved.
引用
收藏
页码：408 / 415
页数：8
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