A 400-MHz, 12-bit, 18-mW, IF digitizer with mixer inside a sigma-delta modulator loop

被引：18

作者：

Namdar, A ^{[1
]}

Leung, BH

机构：

[1] Philsar Semicond Inc, Nepean, ON K2E 7Y1, Canada

[2] Univ Waterloo, Dept Elect & Comp Engn, Waterloo, ON N2L 3G1, Canada

来源：

IEEE JOURNAL OF SOLID-STATE CIRCUITS | 1999年 / 34卷 / 12期

基金：

加拿大自然科学与工程研究理事会;

关键词：

intermediate-frequency (IF) digitizer; digitizer; sigma-delta modulator; wireless circuits;

D O I：

10.1109/4.808901

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A 0.8-mu BiCMOS; 400-MHz intermediate-frequency digitizer based on embedding a down-conversion mixer inside a sigma-delta modulator together with a reconstruction filter in the feedback path has been developed, The digitizer, when subsampled with a clock of 20 MHz, achieves a measured resolution of 12 bits for a 40-kHz bandwidth and dissipates 18 mW of power, The third harmonic distortion (HD3) is less than -90 dBc for a -4-dB input, and the third order intermodulation product (IM3) is less than -70 dBc for a -8-dB input, with a full-scale voltage of 0.5 V, The chip area is 1.5 mm(2).

引用

页码：1765 / 1776

页数：12

共 7 条

[1] A 0.25-mW low-pass passive sigma-delta modulator with built-in mixer for a 10-MHz IF input [J].