CMOS versus bipolar Hall plates regarding offset correction

Integrated silicon Hall devices are used to measure magnetic fields. Unfortunately, they cannot be used in low field applications because they suffer from a large, unpredictable and drifting offset. Using the spinning-current method the offset can be reduced to a few microtesla, which enables low field applications. This paper reports on the influence of the fabrication process, CMOS or bipolar, on the offset of spinning-current Hall plates. The depletion layer width of the junction that defines the boundaries of the Hall plate, which is different for the two fabrication processes, influences the sensitivity, resistance, and offset of integrated Hall plates. Theoretical studies can predict the sensitivity and resistance, but not the offset. The depletion layer width depends on the bias current and the substrate voltage. To study the influence of the depletion layer width on the Hall plates' characteristics these two parameters are varied. Experiments show that the spinning-current principle drastically reduces the offset, independent of the bias current and substrate voltage, and therefore independent of the depletion layer width and fabrication method. (C) 1999 Elsevier Science S.A. All rights reserved.