CMOS Oscillators for Clock Distribution and Injection-Locked Deskew

被引:50
作者
Hossain, Masum [1 ]
Carusone, Anthony Chan [1 ]
机构
[1] Univ Toronto, Dept Elect & Comp Engn, Toronto, ON M5S 3G4, Canada
关键词
Clock deskew; injection locking; jitter filtering; Q-VCO; ring oscillator; RECOVERY CIRCUIT; VCO; LOCKING;
D O I
10.1109/JSSC.2009.2022917
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
The distribution and alignment of high-frequency clocks across a wide bus of links is a significant challenge in modern computing systems. A low power clock source is demonstrated by incorporating a buffer into a cross-coupled oscillator. Because the load is isolated from the tank, the oscillator can directly drive 50-Ohm impedances or large capacitive loads with no additional buffering. Using this topology, a quadrature VCO (QVCO) is implemented in 0.13 mu m digital CMOS. The QVCO oscillates at 20 GHz, consumes 20 mW and provides 12% tuning range. The measured phase noise is -101 dBc/Hz @ 1 MHz frequency offset. A clock alignment technique based upon injection-locked quadrature-LC or ring oscillators is then proposed. Although injection-locked oscillators (ILOs) are known to be capable of deskewing and jitter filtering clocks, a study of both LC and ring ILOs indicates significant variation in their jitter tracking bandwidth when used to provide large phase shifts. By selectively injecting different phases of a quadrature-LC or ring VCO, this problem is obviated resulting in reduced phase noise. The technique is demonstrated using a LC QVCO at 20 GHz while burning only 20 m W of power and providing an 8 dB improvement in phase noise. A ring oscillator deskews a 2 to 7 GHz clock while consuming 14 mW in 90 nm CMOS.
引用
收藏
页码:2138 / 2153
页数:16
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