Capacitive Coupling Analysis of TSV Array in 3D Packaging

被引：0
作者：
Luo Guang-Xiao [1 ]
Li Er-Ping [2 ]
Wei Xing-Chang [2 ]
Cui Xiang [1 ]
机构：
[1] North China Elect Power Univ, Beijing, Peoples R China
[2] Zhejiang Univ, Cyber Innovat Joint Res Ctr, Hangzhou 310003, Zhejiang, Peoples R China
来源：
2014 XXXITH URSI GENERAL ASSEMBLY AND SCIENTIFIC SYMPOSIUM (URSI GASS) | 2014年
关键词：
SILICON;
D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
In 3D-TSVs (through silicon vias) interposer layer, the capacitive coupling effects of TSV array are modeled and analyzed for signal transmission. To consider the semiconductor characteristics, the multi-conductor model is presented to model the TSV array by combining the MOS capacitance with the passive RLGC parameters. After that, the values of MOS capacitance and RLGC are extracted. Finally, by using model order reduction, the capacitive coupling characteristic of TSV array is simulated and analyzed for the signal transmission.
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页数：4
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