Windowed phase comparator for an 80Gbit/s CDR

被引:0
作者
Beraud-Sudreau, Q. [1 ]
Mazouffre, O. [1 ]
Pignol, M. [2 ]
Baguena, L. [3 ]
Neveu, C. [3 ]
Begueret, J-B. [1 ]
Taris, T. [1 ]
机构
[1] Univ Bordeaux, IMS Lab, Bordeaux, France
[2] CNES, Toulouse, France
[3] Thales Alenia Space, Toulouse, France
来源
2012 19th IEEE International Conference on Electronics, Circuits and Systems (ICECS) | 2012年
关键词
CDR; injection locked oscillator; ILO; phase comparator; Injection locked CDR; CLOCK RECOVERY;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
High speed clock and data recovery (CDR) is a key component in future high speed communication link. In this paper an 80 Gbit/s CDR with a windowed phase comparator is presented. The CDR uses an Injection Locked Oscillator (ILO) and a PLL to lock the data frequency. The IC has been fabricated in a SiGe BiCMOS technology
引用
收藏
页码:185 / 188
页数:4
相关论文
共 7 条
[1]   CLOCK RECOVERY FROM RANDOM BINARY SIGNALS [J].
ALEXANDER, JDH .
ELECTRONICS LETTERS, 1975, 11 (22) :541-542
[2]  
Beraud-Sudreau Q, 2012, IEEE INT NEW CIRC, P25, DOI 10.1109/NEWCAS.2012.6328947
[3]  
Han P-S, IEICE ELECT EXPRESS, V6, P35
[4]   A SELF CORRECTING CLOCK RECOVERY CIRCUIT [J].
HOGGE, CR .
JOURNAL OF LIGHTWAVE TECHNOLOGY, 1985, 3 (06) :1312-1314
[5]  
Hsieh Ming-ta, 2008, CIRCUITS SYSTEMS MAG, V8, P45
[6]   2-4 and 9-12 Gb/s CMOS Fully Integrated ILO-based CDR [J].
Mazouffre, O. ;
Toupe, R. ;
Pignol, M. ;
Deval, Y. ;
Begueret, J. B. .
2010 IEEE RADIO FREQUENCY INTEGRATED CIRCUITS RFIC SYMPOSIUM, 2010, :553-556
[7]   Challenges in the cell-based design of very-high-speed SiGe-bipolar ICs at 100 Gb/s [J].
Moeller, Michael .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2008, 43 (09) :1877-1888