Investigations on the high current behavior of lateral diffused high-voltage transistors

被引:17
作者
Knaipp, M [1 ]
Röhrer, G [1 ]
Minixhofer, R [1 ]
Seebacher, E [1 ]
机构
[1] Proc Dev & Implementat Austriamicrosyst, A-8141 Unterpremstatten, Austria
关键词
CMOS integrated circuits; high-voltage (HV) techniques; LDMOS; power integrated circuits; reduced surface field (RESURF); semiconductor device modeling; SPICE;
D O I
10.1109/TED.2004.835163
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper describes the high current behavior of a lateral, n-channel, high-voltage transistor. The starting points are TCAD experiments where the phenomenological behavior is analyzed. Based on these results a transistor high current model is derived, which is based on the vertical integrated free carrier concentration in the drift region. The important model parameter is the gate voltage, which defines the boundary condition for the free electron concentration at the beginning of the drift region. Because of the coupling of the carrier continuity equation and the Poisson equation (drift-diffusion model), this boundary condition plays a major role, and defines the carrier concentration inside the drift region. Together with an intrinsic low-voltage transistor model (intrinsic NMOS transistor), a series network is solved numerically. The network behavior reflects the TCAD experiments quite well and covers the different electrical regimes (the on-resistance regime, the quasi-saturation regime, and the saturation regime). The model output is compared with the TCAD experiments and the measured transistor data as well.
引用
收藏
页码:1711 / 1720
页数:10
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