A Frequency Tripler Using a Subharmonic Mixer and Fundamental Cancellation

被引:17
作者
Jackson, Brad R. [1 ]
Mazzilli, Francesco [2 ]
Saavedra, Carlos E. [1 ]
机构
[1] Queens Univ, Dept Elect & Comp Engn, Kingston, ON K7L 3N6, Canada
[2] Ecole Polytech Fed Lausanne, Swiss Fed Inst Technol, Dept Microsyst & Microelect, CH-1015 Lausanne, Switzerland
基金
加拿大自然科学与工程研究理事会;
关键词
CMOS analog integrated circuits; frequency conversion; frequency tripler; monolithic microwave integrated circuits (MMICs); subharmonic mixer (SHM); CMOS; DESIGN;
D O I
10.1109/TMTT.2009.2017250
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A new odd-order frequency multiplier topology is demonstrated in this work that uses a subharmonic mixer to realize a frequency tripler. A feedforward circuit is used for fundamental cancellation at the output and eliminates the need for filtering structures. For demonstrative purposes, and to validate the concept, a 1-3-GHz proof-of-concept frequency tripler circuit was fabricated. The tripler circuit achieved a measured output fundamental suppression of up to 30 dB below the third harmonic and a conversion gain of up to 3 dB. The circuit was implemented in CMOS 0.18-mu m technology and the chip area was 0.8 mm(2) including bonding pads.
引用
收藏
页码:1083 / 1090
页数:8
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