Single-Phase Phase-Locked Loop Based on Derivative Elements

被引:40
作者
Guan, Qingxin [1 ]
Zhang, Yu [1 ]
Kang, Yong [1 ]
Guerreo, Josep M. [2 ]
机构
[1] Huazhong Univ Sci & Technol, State Key Lab Adv Elect Engn & Technol, Wuhan 430074, Peoples R China
[2] Aalborg Univ, Inst Energy Technol, DK-9200 Aalborg, Denmark
关键词
Derivative element (DE); digital control; grid-connected system; phase-locked loop (PLL); single phase; GRID SYNCHRONIZATION; GENERATION SYSTEM; CONTROL STRATEGY; PLL; DESIGN; CONVERTER; MODES;
D O I
10.1109/TPEL.2016.2602229
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
High-performance phase-locked loops (PLLs) are critical for power control in grid-connected systems. This paper presents a new method of designing a PLL for single-phase systems based on derivative elements (DEs). The quadrature signal generator (QSG) is constructed by two DEs with the same parameters. The PLL itself is realized by using the DE-based QSG. It avoids errors due to the overlap and accumulation that are present in PLLs based on integral elements, such as a PLL based on a second-order generalized integrator. Additionally, frequency feedback is not needed which allows the proposed PLL to achieve high performance when the grid frequency changes rapidly. This paper presents the model of the PLL and a theoretical performance analysis with respect to both the frequency-domain and time-domain behavior. The error arising from the discretization process is also compensated, ensuring this PLL method is suitable for implementation in a digital control system. Simulation and experimental results show that the proposed PLL achieves good performance in both harmonic rejection and dynamic response.
引用
收藏
页码:4411 / 4420
页数:10
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