Multi-GHZ Modeling and Characterization of On-Chip Power Delivery Network

被引:0
作者
Pandit, Vishram S. [1 ]
Ryu, Woong Hwan [1 ]
机构
[1] Intel Corp, Folsom, CA 95630 USA
来源
2008 IEEE-EPEP ELECTRICAL PERFORMANCE OF ELECTRONIC PACKAGING | 2008年
关键词
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
On-chip PDN consists of power grid and the intentional decap. In this paper, we demonstrate a technique to determine the on-chip PDN model for a chipset. 2D TLM approach can be used up-to several GHz.
引用
收藏
页码:105 / 108
页数:4
相关论文
共 4 条
[1]  
IHM JY, 2005, EL COMP TECHN C
[2]  
MEZHIBA A, 2004, IEEE T VLSI SYSTEMS, V12
[3]  
PANDIT VS, SIMULATION CHARACTER
[4]  
SURYAKUMAR M, 2005, EL COMP TECHN C