Low frequency noise and fluctuations in sub 0.1 μm bulk and SOICMOS technologies

A review of recent results on the low frequency noise in advanced Si-based CMOS devices is given. The modeling approaches such as the carrier number and the Hooge mobility fluctuations used for the diagnostic of the noise sources are presented and illustrated through experimental data obtained on modem SOI and Si bulk CMOS generations. For SOI devices fully-depleted MOSFET's and double-gate structures are focused. The impact of the back gate voltage on the 1/f noise is analyzed. For Si bulk devices, a special emphasis is addressed to the role of gate leakage on both static and LF noise characteristics.