Wafer bonding in silicon electronics

被引：6
作者：
Reiche, Manfred [1 ]
机构：
[1] Max Planck Inst Microstruct Phys, D-06120 Halle, Germany
来源：
PHYSICA STATUS SOLIDI C - CURRENT TOPICS IN SOLID STATE PHYSICS, VOL 6, NO 3 | 2009年 / 6卷 / 03期
关键词：
REGULAR DISLOCATION NETWORKS; X-RAY PHOTOELECTRON; ON-INSULATOR; BONDED SILICON; STRAIN RELAXATION; SI; INTERFACES; SUBSTRATE; SURFACES; ADHESION;
D O I：
10.1002/pssc.200880721
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
Semiconductor wafer bonding offers a new degree of freedom in the design of material combinations without the common restrictions of the structure of the materials bonded. It is already an established method for the industrial production of advanced substrates (SOI) applied as basic material in high-performance device fabrication. SOI, i.e. a thin device layer on an insulator, is a promising concept for further device developments. The advantages of SOI can be combined with mobility enhancing materials such as strained silicon (SSOI) or germanium on insulator (GOI). The bonding process is not limited to a certain wafer diameter and is applicable to different material combinations which are important to integrate different functions on a chip (system on a chip, SoC). (C) 2009 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim
引用
收藏
页码：633 / 644
页数：12
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