Electrically reconfigurable logic design using multi-gate spin Field Effect Transistors

In this paper, triple- and quadruple-gate spin-FETs are proposed and later Verilog-A model files of the modelled devices have been created and included in HSPICE tool to obtain various 2-input and 3-input logic functions. Different logic functions are obtained from a single multi-gate spin-FET by changing control voltage at one of the gate terminal, while applying inputs at the other gate terminals. Only one triple-gate and quadruple-gate spin-FETs are employed to implement various 2-input and 3-input logic functions respectively. The implemented functions also include 3-input XOR and majority gate functions which form the sum and carry of full-adder circuit. Besides, the achievement of higher-order logic functions has been demonstrated by cascading the multi-gate spin FETs. In addition, the effect of channel length for obtaining different logic functions has been considered in the paper. The operations of the logic circuits have been verified using HSPICE simulation software.