A finite state machine based fault tolerance technique for sequential circuits

被引:13
作者
El-Maleh, Aiman H. [1 ]
Al-Qahtani, Ayed S. [2 ]
机构
[1] King Fahad Univ Petr & Minerals, Dept Comp Engn, Dhahran, Saudi Arabia
[2] King Saud Univ, Dept Comp Engn, Riyadh, Saudi Arabia
关键词
DESIGN;
D O I
10.1016/j.microrel.2013.10.022
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
With technology advancement at the nanometer scale, systems became more subjected to higher manufacturing defects and higher susceptibility to soft errors. Currently, soft errors induced by ion particles are no longer limited to a specific field such as aerospace applications. This raises the challenge to come up with techniques to tackle soft errors in both combinational and sequential circuits. In this work, we propose a finite state machine (FSM) based fault tolerance technique for sequential circuits. The proposed technique is based on adding redundant equivalent states to protect few states with high probability of occurrence. The added states guarantee that all single faults occurring in the state variables of highly occurring states or in their combinational logic are tolerated. The proposed technique has minimal area overhead as only few states need protection. (C) 2013 Elsevier Ltd. All rights reserved.
引用
收藏
页码:654 / 661
页数:8
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