Self-heating eeffects in SOINLDEMOS power devices

被引：0

作者：

Dieudonne, F. ^{[1
]}

Haendler, S. ^{[1
]}

Chouteau, S. ^{[1
]}

Rosa, J. ^{[1
]}

Waltz, P. ^{[1
]}

Perrotin, A. ^{[1
]}

Boissonnet, L. ^{[1
]}

Rauber, B. ^{[1
]}

Schaffnit, C. ^{[1
]}

Raynaud, C. ^{[1
]}

机构：

[1] Crolles R&D, STMicroelect, 850 Rue Jean Monnet BP 16, F-38926 Crolles, France

来源：

2006 25TH INTERNATIONAL CONFERENCE ON MICROELECTRONICS, VOLS 1 AND 2, PROCEEDINGS | 2006年

关键词：

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Self-heating is evaluated in high-voltage devices from a 0.13 mu m thin-film SOI CMOS technology. Our measurement procedure is described. The influence of different parameters such as layout variations is finally investigated, and main results are shown here. A strong linear correlation between the thermal resistance and the reverse of the active surface is demonstrated. Besides, a moderate impact of the metallization is observed.

引用

页码：201 / +

页数：2

共 6 条

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