Incidence of oxide and interface degradation on MOSFET performance

被引:2
|
作者
Cester, A
Bandiera, L
Cimino, S
Paccagnella, A
Ghidini, G
机构
[1] Univ Padua, Dipartimento Ingn Informaz, I-35131 Padua, Italy
[2] Ist Nazl Fis Mat, Unita Padova, I-35131 Padua, Italy
[3] ST Microelect, I-20041 Agrate Brianza, Italy
关键词
CMOS devices; oxide reliability; accelerated lifetests;
D O I
10.1016/j.mee.2003.12.018
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In this work, we have studied how oxide and interface degradation affect the performance of MOSFETs with ultrathin gate oxide, in terms of transconductance (g(m)), saturation drain current (I-ds,(SAT)), and threshold voltage (V-th) before soft breakdown and hard breakdown. MOSFET transconductance and drain current decrease due to oxide traps which act as interface state reducing channel carrier mobility and enhancing the drain current noise. We found strong correlation between these traps and the well-known stress induced leakage current (SILC) indicating that the same traps producing the degradation of MOSFET characteristics are those involved in SILC conduction. (C) 2004 Elsevier B.V. All rights reserved.
引用
收藏
页码:66 / 70
页数:5
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