A Phase-Locked Loop Algorithm for Single-Phase Systems With Inherent Disturbance Rejection

被引：22

作者：

Lima, Francisco Kleber de A. ^{[1
]}

Araujo, Renato G. ^{[1
]}

Tofoli, Fernando L. ^{[2
]}

Branco, Carlos Gustavo C. ^{[1
]}

机构：

[1] Univ Fed Ceara, Dept Elect Engn, BR-60455760 Fortaleza, Ceara, Brazil

[2] Univ Fed Sao Joao del Rei, Dept Elect Engn, BR-36307352 Sao Joao Del Rei, Brazil

来源：

IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS | 2019年 / 66卷 / 12期

关键词：

Grid synchronization; harmonics; interharmonics; phase-locked loop (PLL); power electronic converters; PLL STRUCTURE; INTERHARMONICS; HARMONICS;

D O I：

10.1109/TIE.2019.2893834

中图分类号：

TP [自动化技术、计算机技术];

学科分类号：

0812 ;

摘要：

This paper presents a phase-locked loop algorithm adequate for applications regarding single-phase power grids. The proposed approach is based on the correlation of the input signal with a complex one obtained from an adaptive filter aiming at minimizing computational burden and increasing accuracy when compared with a former algorithm previously proposed in the literature. Thus, it is possible to obtain high disturbance rejection, especially when dealing with the presence of subharmonics and interharmonics in the frequency spectrum of the supply voltage. Performance is thoroughly evaluated through experimental tests considering both steady-state and dynamic behaviors, while a proper comparison is established with other similar solutions.

引用

页码：9260 / 9267

页数：8

共 24 条

[1] A new simple structure PLL for both single and three phase applications [J].

Ahmad, Ahmad Ale ;

Pichan, Mohammad ;

Abrishamifar, Adib .

INTERNATIONAL JOURNAL OF ELECTRICAL POWER & ENERGY SYSTEMS, 2016, 74 :118-125

[2] An improved control strategy of 3P4W DVR systems under unbalanced and distorted voltage conditions [J].

Al Hosani, Khalifa ;

Thanh Hai Nguyen ;

Al Sayari, Naji .

INTERNATIONAL JOURNAL OF ELECTRICAL POWER & ENERGY SYSTEMS, 2018, 98 :233-242

[3]

Benhabib MC, 2005, ISIE 2005: Proceedings of the IEEE International Symposium on Industrial Electronics 2005, Vols 1- 4, P827

[4] A new single-phase PLL structure based on second order generalized integrator [J].

Ciobotaru, Mihai ;

Teodorescu, Remus ;

Blaabjerg, Frede .

2006 IEEE POWER ELECTRONICS SPECIALISTS CONFERENCE, VOLS 1-7, 2006, :361-+

[5] Sub-synchronous interactions caused by the PLL in the grid-connected PMSG for the wind power generation [J].

Du, Wenjuan ;

Wang, Xubin ;

Wang, Haifeng .

INTERNATIONAL JOURNAL OF ELECTRICAL POWER & ENERGY SYSTEMS, 2018, 98 :331-341

[6] On the Effects of Unbalances, Harmonics and Interharmonics on PLL Systems [J].

Feola, Luigi ;

Langella, Roberto ;

Testa, Alfredo .

IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT, 2013, 62 (09) :2399-2409

[7] Single-Phase PLLs: A Review of Recent Advances [J].

Golestan, Saeed ;

Guerrero, Josep M. ;

Vasquez, Juan C. .

IEEE TRANSACTIONS ON POWER ELECTRONICS, 2017, 32 (12) :9013-9030

[8] Design and Tuning of a Modified Power-Based PLL for Single-Phase Grid-Connected Power Conditioning Systems [J].

Golestan, Saeed ;

Monfared, Mohammad ;

Freijedo, Francisco D. ;

Guerrero, Josep M. .

IEEE TRANSACTIONS ON POWER ELECTRONICS, 2012, 27 (08) :3639-3650

[9] Single-Phase Phase-Locked Loop Based on Derivative Elements [J].

Guan, Qingxin ;

Zhang, Yu ;

Kang, Yong ;

Guerreo, Josep M. .

IEEE TRANSACTIONS ON POWER ELECTRONICS, 2017, 32 (06) :4411-4420

[10] A Synchronization Scheme for Single-Phase Grid-Tied Inverters Under Harmonic Distortion and Grid Disturbances [J].

Hadjidemetriou, Lenos ;

Yang, Yongheng ;

Kyriakides, Elias ;

Blaabjerg, Frede .

IEEE TRANSACTIONS ON POWER ELECTRONICS, 2017, 32 (04) :2784-2793

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