Low-voltage dynamic biasing technique for CMOS class AB current-mode circuits

被引：8

作者：

Palmisano, G ^{[1
]}

Pennisi, S ^{[1
]}

机构：

[1] Univ Catania, Dipartimento Elettr Elettron & Sistemist, I-95125 Catania, Italy

来源：

ELECTRONICS LETTERS | 2000年 / 36卷 / 02期

关键词：

Current mode circuits - Low voltage dynamic biasing;

D O I：

10.1049/el:20000120

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A novel dynamic biasing technique that can br used for the design of CMOS class AB current-mode circuits is presented. The approach takes advantage of the switched capacitor (SC) technique and enables extremely low voltage operations. An application of the proposed technique to the design of a basic input stage is given and simulations showing good agreement with the expected results are provided.

引用

页码：114 / 115

页数：2