Adaptive Transaction Scheduling for Transactional Memory Systems

被引:0
作者
Yoo, Richard M. [1 ]
Lee, Hsien-Hsin S. [1 ]
机构
[1] Georgia Inst Technol, Sch Elect & Comp Engn, Atlanta, GA 30332 USA
来源
SPAA'08: PROCEEDINGS OF THE TWENTIETH ANNUAL SYMPOSIUM ON PARALLELISM IN ALGORITHMS AND ARCHITECTURES | 2008年
关键词
Contention Intensity; Parallelism; Performance; Transaction Effectiveness; Transactional Memory Systems;
D O I
暂无
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Transactional memory systems are expected to enable parallel programming at lower programming complexity, while delivering improved performance over traditional lock-based systems. Nonetheless, there are certain situations where transactional memory systems could actually perform worse. Transactional memory systems can outperform locks only when the executing workloads contain sufficient parallelism. When the workload lacks inherent parallelism, launching excessive transactions can adversely degrade performance. These situations are likely to become dominant in future workloads when large-scale transactions are frequently executed. In this paper, we propose a new paradigm called adaptive transaction scheduling to address this issue. Based on the parallelism feedback from applications, our adaptive transaction scheduler dynamically dispatches and controls the number of concurrently executing transactions. In our case study, we show that our low-cost mechanism not only guarantees that hardware transactional memory systems perform no worse than a single global lock, but also significantly improves performance for both hardware and software transactional memory systems.
引用
收藏
页码:169 / 178
页数:10
相关论文
共 50 条
  • [41] A Comprehensive Strategy for Contention Management in Software Transactional Memory
    Spear, Michael F.
    Dalessandro, Luke
    Marathe, Virendra J.
    Scott, Michael L.
    [J]. ACM SIGPLAN NOTICES, 2009, 44 (04) : 141 - 150
  • [42] TurboLock: increasing associativity of lock table in transactional memory
    Bavarsad, Amir Ghanbari
    Atoofian, Ehsan
    [J]. COMPUTING, 2015, 97 (06) : 649 - 661
  • [43] Early Experience with a Commercial Hardware Transactional Memory Implementation
    Dice, Dave
    Lev, Yossi
    Moir, Mark
    Nussbaum, Dan
    [J]. ACM SIGPLAN NOTICES, 2009, 44 (03) : 157 - 168
  • [44] ProPS: A Progressively Pessimistic Scheduler for Software Transactional Memory
    Rito, Hugo
    Cachopo, Joao
    [J]. EURO-PAR 2014 PARALLEL PROCESSING, 2014, 8632 : 150 - 161
  • [45] Compiler and runtime support for efficient software transactional memory
    Adl-Tabatabai, Ali-Reza
    Lewis, Brian T.
    Menon, Vijay
    Murphy, Brian R.
    Saha, Bratin
    Shpeisman, Tatiana
    [J]. ACM SIGPLAN NOTICES, 2006, 41 (06) : 26 - 37
  • [46] Effective Transactional Memory Execution Management for Improved Concurrency
    Gonzalez-Mesa, M. A.
    Gutierrez, Eladio
    Zapata, Emilio L.
    Plata, Oscar
    [J]. ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION, 2014, 11 (03) : 23 - 49
  • [47] Transactional memory analysis using CSB plus trees
    Bansal, Rishab
    Ramachandran, Puvichakravarthy
    [J]. INTERNATIONAL CONFERENCE ON ADVANCES IN INFORMATION COMMUNICATION TECHNOLOGY & COMPUTING, 2016, 2016,
  • [48] Improving performance of transactional memory through machine learning
    Xiao, Yang
    Jeyakumaran, Thireshan
    Atoofian, Ehsan
    Jannesari, Ali
    [J]. CONCURRENCY AND COMPUTATION-PRACTICE & EXPERIENCE, 2018, 30 (10)
  • [49] Leveraging Transactional Execution for Memory Consistency Model Emulation
    Natarajan, Ragavendra
    Zhai, Antonia
    [J]. ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION, 2015, 12 (03)
  • [50] Snake: Control Flow Distributed Software Transactional Memory
    Saad, Mohamed M.
    Ravindran, Binoy
    [J]. STABILIZATION, SAFETY, AND SECURITY OF DISTRIBUTED SYSTEMS, 2011, 6976 : 238 - 252